Best Books for GATE, ISRO, PSUs

Friends, I am mentioning here some good books for GATE, ISRO, PSUs and for all type of competitive exams. These books are really very nice theoretically and conceptually. Among them some of are my favorite also. I have also given the pictures of their cover page so that it will be easy for you to recognize the books.

Friends, I am mentioning here some good books for GATE, ISRO, PSUs and for all type of competitive exams. These books are really very nice theoretically and conceptually. Among them some of are my favorite also. I have also given the pictures of their cover page so that it will be easy for you to recognize the books.

FOR ANALOG ELECTRONICS

Title: Electronic Devices and Circuit Theory, 9th Edition
Author: Robert L. Boylestad, Louis Nashelsky
Publication: Pearson
Contents: Diodes, Diode applications, BJT, DC Biasing-BJT, BJT AC Analysis, FET, FET Biasing, FET Amplifier, BJT & FET frequency response, Operational Amplifier, Power Amplifier, Linear-Digital ICs, Feedback & Oscillator circuits, Power Supplies (Voltage Regulators), Other two terminal devices, pnpn and other devices



FOR DIGITAL ELECTRONICS

Title: Digital Design, 4th Edition
Author: M. Morris Mano, Michael D. Ciletti
Publication: Pearson
Contents: Digital Systems and Binary Numbers, Boolean Algebra and Logic Gates, Gate-Level Minimization, Combinational Logic, Synchronous Sequential Logic, Registers and Counters, Memory and Programmable Logic, Design at the Register Transfer Level, Asynchronous Sequential Logic, Digital Integrated Circuits, Laboratory Experiments with Standard ICs and FPGAs, Standard Graphic Symbols

FOR VLSI

Title: CMOS Digital Integrated Circuits Analysis and Design, 3rd Edition
Author: Sung-Mo Kang, Yusuf Leblebici
Publication: TATA McGraw-Hill
Contents: Fabrication of MOSFETS, MOS Transistor, Modeling of MOS Transistors using SPICE, MOS Inverters: Static Characteristics, MOS Inverters: Switching Characteristics and Interconnect Effects, Combinational MOS Logic Circuits, Sequential MOS Logic Circuits, Dynamic Logic Circuits, Semiconductor Memories, Low-Power CMOS Logic Circuits, BICOMS Logic Circuits, Chip Input and Output Circuits, Design for Manufacturability, Design for Testabililty

FOR COMMUNICATION SYSTEM

Title: Principles of Communication Systems, 3rd Edition
Author: Herbert Taub, Donald Schilling, Goutam Saha
Publication: TATA McGraw-Hill
Contents: Introduction: Signal and Spectra, Random variables and Processes, Amplitude-Modulation Systems, Angle Modulation, Pulse Modulation and Digital Transmission of Analog Signal, Digital Modulation and Transmission, Mathematical Representation of Noise, Noise in Amplitude Modulation System, Noise in Frequency Modulation Systems, Phase Locked Loops, Optimal Reception of Digital Signal, Noise in Pulse Code Modulation and Delta Modulation Systems, Information Theory and Coding, Communication Systems and Component Noises, Spread Spectrum Modulation

FOR ELECTROMAGNETIC THEORY

Title: Electromagnetic Field Theory Fundamentals, 2nd Edition
Author: Bhag Singh Guru, Hüseyin R. Hiziroglu
Publication: Cambridge University Press
Contents: Electromagnetic Field Theory, Vector Analysis, Electrostatics, Steady Electric Currents, Magnetostatics, Application of static fields, Time-varying Electromagnetic Fields, Plane Wave Propagation, Waveguides and Cavity Resonators, Antennas, Computer-aided Analysis of Electromagnetic Fields

FOR MICROWAVE ENGINEERING

Title: Microwave Engineering, 3rd Edition
Author: David M. Pozar
Publication: Wiley India
Contents: Electromagnetic Theory, Transmission Line Theory, Transmission Lines And Waveguides, Microwave Network Analysis, Impedance Matching And Tuning, Microwave Resonators, Power Dividers And Directional Couplers, Microwave Filters, Theory And Design Of Ferrimagnetic Components, Noise And Active Rf Components, Microwave Amplifier Design, Oscillators And Mixers

FOR DIGITAL SIGNAL PROCESSING

Title: Digital Signal Processing, 4th Edition
Author: P.Ramesh Babu
Publication: SCITECH
Contents: Discrete-time Signals and Linear Systems, Z-Transform, Discrete Fourier Transform, Fast Fourier Transform, Infinite Impulse Response Filters, Finite Impulse Response Filters, Finite Word Length Effects in Digital Filters, Multirate Signal Processing, Statistical Digital Signal Processing, Applications of Digital Signal Processing, Digital Signal Processors

NETWORK THEORY

Title: Circuit Theory (Analysis and Synthesis)
Author: Abhijit Chakrabarti
Publication: Dhanpat Rai & Co

FOR OBJECTIVE BOOK

There are many books available in market for objective type questions and answers and MCQs. I am going to mention here some good books here. First I will write some good books exam wise and then I will mention in general.

FOR GATE: GK publication's book. The objective books prepared by MADE EASY. You can also buy chapter wise study materials for GATE prepared by MADE EASY (there are separate materials available for theory and MCQs).
 

FOR ISRO: Gateway to....ISRO by UPKAR publication

FOR PSUs AND OTHER COMPETITIVE EXAMS: The above mention books are also applicable for other competitive exams and PSUs. There is no such rule that GATE questions will come from GATE study materials only.  
But still some good books for this section are M. Handa Objectice book where you will get both theory and questions, a book for conventional and objective questions and answers by A.K. Maini from Khana Publishers.

Electronics & comm. Ques and Ans-1

Drift current in the semiconductors depends upon  [GATE 2011]

(a) only the electric field
(b) only the carrier concentration gradient
(c) both the electric field and the carrier concentration
(d) both the electric field and the carrier concentration gradient

Which of the following correctly depicts the capacitance of cylindrical capacitor

  

Which of the following can be ignored in a transmission line at radio wave frequency

(a) R and G           (b) G and L

(c) R and C           (d) L and C

Which of the following is correct

(a) In pre-emphasis magnitude of low frequencies are increased
(b) In de-emphasis magnitude of high frequencies are decreased
(c) In pre-emphasis magnitude of high frequencies are decreased
(d) In de-emphasis magnitude of low frequencies are increased

Which of the following logic family is used when the noise is very high

(a) DTL                        (b) TTL

(c) RTL                        (d) HTL

Which of the following statement is correct for a transistor
(a) Collector region is physically larger than emitter region
(b) Collector is heavily doped and emitter is lightly doped
(c) Emitter, Base is heavily doped and collector is lightly doped
(d) In a PNP transistor the collector collects the electrons from the base

In a PNP transistor under normal biased condition which of the following flows from emitter to base in forward biased junction

(a) Minority carrier hole
(b) Majority carrier holes
(c) Minority carrier electrons
(d) Majority carrier electrons

For a common base PNP transistor which of the following statement is correct

(a) Input resistance is greater than output resistance
(b) Output resistance is greater than input resistance
(c) Both input and output resistance are equal
(d) None of these

Which of the following correctly depicts the relation between I_CBO and I_CEO

In a NPN transistor when both the collector-base and emitter-base junction is forward-biased then the transistor operates in

(a) Active region           (b) Cut off region

(c) Saturation region      (d) Inverted region

Which of the following is correct

(a) Both UJT and FET are unipolar
(b) UJT is unipolar and FET is bipolar
(c) UJT is bipolar and FET is unipolar
(d) Both UJT and FET are bipolar

Answers

(1)-c Explanation: When a semiconductor is subjected to external electric field the charge carriers inside it attains certain velocity called drift velocity(V_d). The current due to this motion of charge carriers is called drift current. Drift current= qE(nμ_n+pμ_p). Where μ_n and μ_p are the mobilities of electrons and holes respectively. q is the charge of electron. E is the external electric field. p and n are concentration of charge carriers.

(2)-c Explanation: r₂ is the outer radius and r₁ is the inner radius of the capacitor
(3)-a Explanation: At radio wave frequency inductive reactance(L) becomes much greater than resistance(R) and capacitative susceptance(C) much grater than conductance(G). So R and G can be ignored. In this case the transmission line will be said as a losless transmission line.
(4)-b Explanation: In FM system at higher frequencies the noise becomes more. Hence pre-emphasis is used to increase the amplitude of higher frequencies before modulation. At the receiver end the amplitude of those higher frequencies is decreased to get back the original signal. This process at the receiver end is called de-emphasis.
(5)-d Explanation: High Threshold Logic(HTL) is used when the noise is very high. Another advantage of HTL is its increased noise margin. The disadvantage of HTL is its slow speed (HTL propagation delay-110ns, TTL propagation delay-10ns).
(6)-a Explanation: In a Bipolar Junction Transistor the collector region is physically larger than the emitter region. The doping concentration of Emitter > Collector > Base. In a PNP transistor the emitter is P type so it emits holes which is collected by the collector from the base.
(7)-b Explanation: Normal biased condition means emitter-base junction is forward biased and collector-base junction is reverse biased. So in a PNP transistor under normal biased condition holes flows from p-type emitter towards base.
(8)-b Explanation: From the input and output characteristic of the transistor it is confirmed that the output resistance is greater than the input resistance. You can know this from the slope of the curve. The more horizontal the curve the higher is the resistance.

(9)-c Explanation: We know the equation I_C=αI_E+I_CBO. Which implies that I_C=α(I_C+I_B)+I_CBO Now putting I_B=0 and solving for I_C we will get the answer.
(10)-c Explanation: In a transistor in the saturation region the base-emitter and collector-base region are forward biased.
(11)-a Explanation: see the following classification

Free Circuit Simulators

LTspice

It is a circuit simulator, SPICE simulator, schematic capture and waveform viewer. It is a very useful software for analog circuit simulation and also very easy to use. This will help you in transient, ac, noise and dc analysis as well as Fourier analysis. It is extensively used by various educational institution and students. 
Note: Download the software from the following download link. If it does not work then go to the website link and then manually go to the download page.
Download LTspice      Website

SimOne

This includes capture schematic editor which helps in schematic reading and editing, component selection, and simulation control of analog circuits. The features include DC analysis, AC analysis, Transient analysis, PSS analysis, Temperature sweep, Parameter sweep, Stability analysis.

Note: Download the software from the following download link. If it does not work then go to the website link and then manually go to the download page.
Download SimOne      Website

SapWin

This is a very useful tool which will help you to create the schematic of a linear analog circuit, to find network function in Laplace domain and to show the results in graphic form. In this tool you will get all passive and active, bipolar and two-port, linear components, including RLC elements, operational amplifiers and small-signal equivalent models of BJT and MOSFET transistors. This tool is available at University of Florence website.
Note: Download the software from the following download link. If it does not work then go to the website link and then manually go to the download page.
Download SapWin         Website

Micro-Cap

This is useful for both analog and digital circuit simulations and also it is SPICE compatible. This has been developed by Spectrum Software. It was first released as Micro-Cap package in 1982. Since that day it has been steadily expanded and improved. This is the first logic simulation system to be available in personal computers. The latest version is Micro-Cap 10.
Note: Download the software from the following download link. If it does not work then go to the website link and then manually go to the download page.
Download Micro-Cap     Website

Logisim

It is a digital circuit simulator having a graphical user interface similar to traditional drawing. One of its interesting feature is that it allows simulation of circuits as you build them. It has been written completely in JAVA programming language using Swing. It allows to build the circuits from truth tables using combinational analysis module.
Note: Download the software from the following download link. If it does not work then go to the website link and then manually go to the download page.
Download Logisim        Website 

5Spice

With this tool you can design spice models and sub-circuits easily with a GUI schematic editor. You can define, name and save unlimited numbers of analyses, each with a corresponding graph. It also has support for analysis of alternative designs. After installation on the right side of the screen you will get a toll bar from where you can drag and drop all the components like resistor, capacitor, diode, op-amp, logic gates, voltage source etc.

Note: Download the software from the following download link. If it does not work then go to the website link and then manually go to the download page.

Download 5Spice     Website

Envelope Detector

Envelope detector circuit uses a diode, a capacitor and a resistor and it is just like a half wave rectifier followed by a low-pass filter. It is a linear detector which takes high frequency RF signal as input and gives an output which is the envelope of the input signal. A diode detector is a type of envelope detector and is used for the detection of AM signal.

Circuit Operation

Here the input signal is rectified by the series diode D. The combination of capacitor C and resistor R behaves like a low-pass filter. The input signal contains both the original message and the carrier wave where the capacitor helps in filtering out the RF carrier waves. The capacitor gets charged during the rising edge and discharges through the resistor R in falling edge. Thus the capacitor helps in giving an envelope of the input as output.

Advantage

• This technique is highly used in AM receivers as it is very simple and cheap. 
• The circuit acts as a linear detector as the output varies as per the voltage of input and the distortion here is very less.

Disadvantage

• The circuit does not have an amplification capability to amplify the rectified signal. Amplification should be done by separate devices.
• Before giving input to the circuit the signal must be bandpass filtered otherwise the circuit will demodulate unnecessary signals.

Compared to advantages the disadvantages are very negligible and hence these circuits are extensively used for AM detection.

Junior Research Fellowship from GATE

What is JRF-GATE ?
From 2002 onwards Council of Scientific & Industrial Research (CSIR), India has introduced a research fellowship program for the students who have qualified GATE with BTech/BE/BArch/BPharm. This fellowship is know as Junior Research Fellowship(JRF-GATE).
What the candidates will do ?
The candidates who will be selected for this will get golden opportunity of working with CSIR scientists in R&D works. The BE/BTech students after getting selected into JRF they have to either take admission directly into Ph.D program in IIT/NIT/REC etc. or they will continue doing MTech as a part of Ph.D.
Age Limit
The upper age limit to apply for JRF is 28 years. The age relaxation is 5 years in case the candidate belongs to SC, ST, OBC, women or physically handicapped.
Duration of Fellowship
Duration of this fellowship is 5 years within which the candidate has to complete the Ph.D. During this fellowship the candidate will get a stipend of Rs 16,000/- per moth in addition with HRA. The candidate will also get a contingency grant of Rs 20,000/-  per annum. After two years as JRF-GATE the fellowship may be upgraded to SRF-GATE and your stipend may increase to 18,000/- per month.

To know detail about this fellowship, eligibility criteria, selection procedure and how to apply for this please visit  http://csirhrdg.res.in/gate.htm  and  http://csirhrdg.res.in/jrfsrfra2.htm

One suggestion for all: Start preparing for GATE seriously and grab these golden opportunities of working with scientists in R&D. Good Luck.

ISRO 2011 Final Result

The interview result of ISRO in 2011 for the post of SCIENTISTS/ENGINEERS 'SC' in the discipline of ELECTRONICS, MECHANICAL and COMPUTER SCIENCE is as follows.

In Electronics total 60 candidates have been listed out, in which 54 have been short listed and 6 are in waiting list. In Mechanical total 40 students have been short listed. In Computer Science total 26 candidates have been listed out, in which 23 have been short listed and 3 are in waiting list. So in total 117 have been shortlisted to whom offer of appointment has been issued.

To get detail list of all candidates who have been short listed click here. Since very less no. of vacancies are there you have to work very hard to get this prestigious opportunity. Download previous year question papers(2006-2011) and try to solve them. This process will help you to know the question paper pattern. To get ISRO 2010 solved paper click here.

ISRO Previous year question papers for Electronics:

http://www.isro.org/pdf/EC-2006.pdf

http://www.isro.org/pdf/EC-2007.pdf

http://www.isro.org/pdf/EC-2008.pdf

http://www.isro.org/pdf/EC-2009.pdf

http://www.isro.org/pdf/EC-2010.pdf 

http://www.isro.org/pdf/Electronics-2011.pdf
 

How to contact ISRO qualified candidates: Just search their names in facebook, send them friend request and if you are lucky enough your request will be accepted. Once your request is accepted ask them all your questions regarding ISRO and take suggestions regarding preparation. To get names of the shortlisted candidates click here. Good luck.

ISRO Interview Questions-2

About ISRO

Indian Space Research Organization (ISRO) is really a great place to work. If you are really lucky enough you will get a job here. ISRO is among the six dominant space research organization in the world. ISRO's first satellite was Aryabhata which was launched in 1975. Starting from that day ISRO is gradually getting momentum in advanced space research. ISRO's reputation got increased after the successful Chandrayaan-1 mission in 2008 which was India's first mission to the moon. According to Chandrayan-2 mission a moon rover will be sent to moon which will move on moon's surface with wheels, collect soil and rock samples, do analysis on it and send the data to spacecraft.

Image Credit: ISRO

Another very exciting news is that after the moon mission ISRO is going to start mars mission very soon. In this mission a spacecraft will be launched in mars orbit which will study its atmosphere. This could be launched in Nov 2013.

ISRO offers the opportunity for the post of Scientists/Engineers 'SC' in the discipline of Electronics and Mechanical Engineering. Currently the pay band for Scientists/Engineers 'SC' is Rs. 15600-39100 with a grade pay of Rs. 5400/-. So at present the gross amount will be  Rs. 33,180/- per month. Besides this House Rent Allowance (HRA) and Transport Allowance (TA) will also be provided who are not availing housing and transport facilities. The employees will also get pension according to new pension scheme. Other facilities include medical facilities for self and dependents, subsidized canteen facilities, limited housing facilities for freshers and many more.

ISRO is a Govt. job. So you can enjoy your life as well as you will learn a lot of things from it. Once you qualify it, you will get a lot of reputation from your society, from you family, from your neighbors and friends. If you want to do research in your life especially about space then ISRO is a good choice. But as there are very less vacancies available, a huge competition will must be there in ISRO exam. You need to prepare accordingly.

After all if some body asks you, "What do you do ?". You will feel proud to say "I am a scientist in ISRO". So do a smart preparation, grab the exciting opportunities from ISRO and finally be a scientist in your life.  

Some Interview Questions 

Q) What do you mean by input bias current in op-amp ? How to mitigate this problem ?
Q) What is the need of pre-emphasis in communication system ?
Q) What is common mode rejection ratio ? How it is measured and what is its unit ?
Q) What is Q factor of a parallel RLC circuit ? What is the significance of Q factor ? 
Q) What is voltage standing wave ratio ? If VSWR=1 then what does it signifies ?
Q) What do you mean by dominant mode of waveguide ? What are the dominant modes of circular and rectangular waveguides ?
Q) Which type of waveguides do not allow TEM modes and why ?

ISRO Interview Questions-1

How to prepare: In interview they generally ask about your favorite subject. So think twice before replying them. They are going to ask questions from your favorite subject. If you are not able to answer even very simple questions from your favorite subject it may create a bad impression. So before going to interview think yourself which subject you personally like the most or about which topic you have more knowledge. 

Following questions are very very important for ISRO Interview. So prepare yourself accordingly.

Q) What is race around condition ? Why it occurs ? How it can be avoided ?

Q) What is Nyquist sampling theorem ? If it will not be satisfied for a communication system what will happen ?

Q) What is fan-out ? What is the mathematical formula to calculate fan-out ?

Q) Describe the process of amplitude modulation ? What is modulation depth ?
Q) What is tri-state logic inverter ? Explain with the help of truth table ?
Q) Draw the equivalent circuit of a microwave transmission line. What do you mean by characteristic impedance and what is its value for a loss less transmission line ?
Q) What do you mean by the terms LEO, GEO and MEO with respect to satellite communication ?
Q) What is Fourier transform ? Why and when it is needed ?
Q) What are the different types of techniques available for error detection and correction in digital communication ?
Q) How can you implement a full subtractor with the help of half subtractors ?

ISRO 2010 solutions-1

You can get ISRO (Scientist/Engineer 'SC' EC-2010) question paper from internet.  I am trying to solve these questions. If there is any wrong in my answers then please reply me. This post contains the following answers
(6)-b, (11)-d, (13)-a, (15)-d, (16)-c, (18)-c, (19)-b, (20)-b, (24)-d, (25)-b, (29)-c, (31)-c, (34)-b, (35)-d, (38)-a, (41)-c, (72)-c, (76)-c, (78)-a, (79)-b

EXPLANATIONS

(6)-b

Note: Design For Testing is a testing process which is done during the manufacturing of different Integrated circuits and hardware. This test is generally done to ensure that the hardware contains no defects that may lead to malfunctioning of the hardware or IC. Application Specific Integrated Circuits (ASIC) are those integrated circuits which are built for a particular purpose.

(11)-d 

Note: Stripline is a conductor which is placed inside a dielectric and the dielectric is again sandwiched by two ground plane on opposite side.

Microstrip line is a conductor separated from the ground plane by a dielectric. It acts like a transmission line which is fabricated just like the printed circuit board(PCB). The main disadvantage of microstrip line is the unwanted radiation loss. As the microstrip is completely an open structure the radiation loss is more here. One disadvantage of stripline is it is more expensive to manufacture compared to microstrip.

(13)-a

Note:

(15)-d

Note: Rank of a matrix is equal to the order of highest non-zero minor. So the rule is: A matrix 'M' is said to be of rank p if and only if there is at least one minor of the matrix 'M' of order p is not zero and all other minors of matrix 'M' of order p+1 are zero.

(16)-c  (I have done it by method of rejection)
Note: 'a' is wrong because the summation of eigen values of a matrix is called trace of the matrix. 'b' is wrong because the eigen values of a skew matrix are purely imaginary and eigen values of symmetrix matrix are real. 'd' is wrong because according to Rouche-Capelli theorem if the rank of augmented matrix is greater than the rank of the coefficient matrix than the system is inconsistent.

(18)-c

Note: The content of the shift register will be changed in the following sequence.

1010-->1101-->0110-->0011-->0001-->1000-->0100-->1010 (here --> represents the clock pulse) 

(19)-b
Note: GDS-II is a binary file which contains all the information about the layout of a integrated circuit. This file format can be used for reconstructing the entire layout structure of an ICs and also to transfer the layout to a different tool. This is the lowest level of abstraction for the representation of digital system.

(20)-b 
Note: MVI - Move Immediate 8-bit data - The immediate 8-bit data will be stored in the destination register. ORA - It will do the logical OR operation of the register with the accumulator and the result will be stored in accumulator. RLC - Rotate accumulator left - Each bit of accumulator will be shifted by one position left. Bit D7 is placed in the position of D0.
A = A7h = 10100111
               10100111
              -----------
A OR A =  10100111
Now shifting each bit of accumulator by one position left we get 01001111 = 4fh

(24)-d
Note: Schottky diode is a diode whose forward voltage drop lies between 0.15-0.45 volts. This voltage drop is very low as compared to 0.6-1.7 voltage drop of a normal PN junction diode.

Schottky Diode

As there is no charge carrier in the depletion region its reverse recovery time is very less. Hence it quickly changes its state from conducting to non conducting and vice versa which leads to increased efficiency. The major disadvantage of Schottky diode is its high reverse leakage current.

(25)-b
Note: In UJT relaxation oscillator, frequency of oscillation is

(29)-c

Note: Ampere's law defines the force of interaction between two current carrying conductor. According to this law force between two parallel conductors is given by

F is the force between the two conductors. I1,I2 are current flowing through the conductors. l is the length of each conductor. d is the distance between the conductors. 

(31)-c

Note:

(34)-b
Note: Shannon-Hartley theorem tells a relation between channel capacity(C), bandwidth(B) and signal to noise ratio(S/N).

(35)-d

Note: As we know that

(38)-a
Note:

(41)-c

Note: Rowland's law or Hopkinson's law for magnetic circuit is equivalent to Ohm's law in electric circuit. According to Ohm's law E=IR where E is EMF, I is current and R is electric resistance. Similarly according to Rowland's law F=Φℜ where F is magneto-motive force, Φ is magnetic flux and ℜ is magnetic reluctance. 

(72)-c
Note:

(76)-c

Note: A point is said to be in a jump discontinuity if for that point, limit L^- and L⁺ exist but they are not equal.The same has been described in the following graph.

(78)-a
Note: Zener diode is a diode which allows the current to flow through it in the reverse biased condition when the reverse voltage reaches the break down voltage. Once the break down occurs the voltage remains at the same level irrespective of the power source. This is the reason for which the zener diode is used as the voltage regulator. So relating to our problem, here the voltage across the load will be the same as the break down voltage of the last zener diode parallel to it. 

(79)-b
Note: Applying Kirchhoff law to the circuit

I(s)=sV2(s)-V2(0)-sI(s)+I(0),  putting all the initial condition zero we will get
V1(s)-I(s)-sI(s)=V2(s)     and    I(s)=sV2(s)-sI(s)
Now putting the value of I(s) from second equation in the first we get Trasfer function=1/(s+1)



Solutions to rest of the questions will be published very soon. Keep on visiting this blog. Thank you.

Analog vs Digital Communication

Analog

The signals which are continuous are called analog signals. For example a sound coming from a car is an analog signal.
Advantage

• Analog signals are less complicated and less expensive.
• Mathematical implementation of analog signal is easier.
• In presence of heavy noise, analog signals never completely degrades.
• Unlike digital signals analog signals does not have any quantization loss.
• It also does not require highly complicated ICs for processing. If some analog components will be present then it can be processed easily.

Disadvantage

• Analog signals are sensitive to noise.
• If analog signal undergoes degradation, it is difficult to verify where and when the degradation occurred.
• It is difficult to enhance the degraded analog signals as it may lead to amplification of noise as well.

Digital

The signals which are represented by binary values 0 and 1 is called digital signals. 0 and 1 corresponds to low voltage and high voltage respectively.

Advantage

• It is easier to store in memory as the entire signal comprises of a series of 0 and 1.
• Digital signal comparatively more immune to noise.
• There are a lot of channel coding and error correction codes are available for an effective and error free transmission of digital signals.
• Degraded digital signals can be easily reconstructed by using advanced algorithms and digital signal processors.

Disadvantage

• Digital signals may be completely lost at the presence of excessive noise.
• Digital signal processing is highly complicated and require a lot of mathematical calculation hence the digital processors are bit expensive.
• Digital signals undergoes quantization loss.
• Digital signals require a bunch of heavily complicated  ICs for its processing.

Control System Ques & Ans (H001)

In force voltage analogy velocity in mechanical system is equivalent to ___ in electrical system.

(a) Charge       (b) Current
(c) Inductance  (d) Capacitance

The transfer function is defined only for

(a) Linear time-invariant system        (b) Nonlinear time-invariant system 

(c) Nonlinear time variant system      (d) Both a and b

Reduce the block diagram and find out the transfer function.

A system has transfer function (1-s)/(1+s). It is known as

(a) Low-pass system                (b) High-pass system
(c) All-pass system                  (d) None of these

The root locus starts from

(a) zeros and ends on poles             (b) poles and ends on zeros
(c) zeros and ends on infinity           (d) poles and ends on infinity

How to find out the angle of asymptotes with the real axis in root locus analysis ?

The open-loop transfer function of a system is given by

  then which of the following is true

(a) There will be a root locus in between -1 and -2

(b) There will be a root locus in between -5 and -2

(c) There will be a root locus in between -5 and -infinity 

(d) Both a and c

If there are x number of poles and y number of zeros then how many root locus branches goes to infinity.

(a) 2x-y                (b) 2y-x
(c) x-y                  (d) x+y

Root locus is the locus of

(a) Open loop poles               (b) Open loop zeros
(c) Closed loop poles             (d) Closed loop zeros

The starting point of root loci are
(a) Open loop poles               (b) Open loop zeros
(c) Closed loop poles             (d) Closed loop zeros

Root loci ends at

(a) Open loop poles               (b) Open loop zeros
(c) Closed loop poles             (d) Closed loop zeros

There is system with transfer function  
                       G(s)H(s)=k(s+3)/(s+1)(s+2)(s+5)

Find the point where the asymptotes of the root locus intersect the real axis
(a) -2.5                 (b) -2
(c) -1.5                 (d) -1

If number of poles is denoted by p and number of zeros is denoted by z then the angle between the adjacent asymptotes in root locus analysis is

(a) 180/(p+z)                 (b) 90/(p-z)
(c) 360/(p+z)                 (d) 360/(p-z)


Answers

1-b,  2-a,  3-a,  4-b,  5-b,  6-d,  7-b,  8-c,  9-c,  10-a  

11-b,  12-a,  13-d