Junior Research Fellowship from GATE

What is JRF-GATE ?
From 2002 onwards Council of Scientific & Industrial Research (CSIR), India has introduced a research fellowship program for the students who have qualified GATE with BTech/BE/BArch/BPharm. This fellowship is know as Junior Research Fellowship(JRF-GATE).
What the candidates will do ?
The candidates who will be selected for this will get golden opportunity of working with CSIR scientists in R&D works. The BE/BTech students after getting selected into JRF they have to either take admission directly into Ph.D program in IIT/NIT/REC etc. or they will continue doing MTech as a part of Ph.D.
Age Limit
The upper age limit to apply for JRF is 28 years. The age relaxation is 5 years in case the candidate belongs to SC, ST, OBC, women or physically handicapped.
Duration of Fellowship
Duration of this fellowship is 5 years within which the candidate has to complete the Ph.D. During this fellowship the candidate will get a stipend of Rs 16,000/- per moth in addition with HRA. The candidate will also get a contingency grant of Rs 20,000/-  per annum. After two years as JRF-GATE the fellowship may be upgraded to SRF-GATE and your stipend may increase to 18,000/- per month.

To know detail about this fellowship, eligibility criteria, selection procedure and how to apply for this please visit  http://csirhrdg.res.in/gate.htm  and  http://csirhrdg.res.in/jrfsrfra2.htm

One suggestion for all: Start preparing for GATE seriously and grab these golden opportunities of working with scientists in R&D. Good Luck.

ISRO 2011 Final Result

The interview result of ISRO in 2011 for the post of SCIENTISTS/ENGINEERS 'SC' in the discipline of ELECTRONICS, MECHANICAL and COMPUTER SCIENCE is as follows.

In Electronics total 60 candidates have been listed out, in which 54 have been short listed and 6 are in waiting list. In Mechanical total 40 students have been short listed. In Computer Science total 26 candidates have been listed out, in which 23 have been short listed and 3 are in waiting list. So in total 117 have been shortlisted to whom offer of appointment has been issued.

To get detail list of all candidates who have been short listed click here. Since very less no. of vacancies are there you have to work very hard to get this prestigious opportunity. Download previous year question papers(2006-2011) and try to solve them. This process will help you to know the question paper pattern. To get ISRO 2010 solved paper click here.

ISRO Previous year question papers for Electronics:

http://www.isro.org/pdf/EC-2006.pdf

http://www.isro.org/pdf/EC-2007.pdf

http://www.isro.org/pdf/EC-2008.pdf

http://www.isro.org/pdf/EC-2009.pdf

http://www.isro.org/pdf/EC-2010.pdf 

http://www.isro.org/pdf/Electronics-2011.pdf
 

How to contact ISRO qualified candidates: Just search their names in facebook, send them friend request and if you are lucky enough your request will be accepted. Once your request is accepted ask them all your questions regarding ISRO and take suggestions regarding preparation. To get names of the shortlisted candidates click here. Good luck.

ISRO Interview Questions-2

About ISRO

Indian Space Research Organization (ISRO) is really a great place to work. If you are really lucky enough you will get a job here. ISRO is among the six dominant space research organization in the world. ISRO's first satellite was Aryabhata which was launched in 1975. Starting from that day ISRO is gradually getting momentum in advanced space research. ISRO's reputation got increased after the successful Chandrayaan-1 mission in 2008 which was India's first mission to the moon. According to Chandrayan-2 mission a moon rover will be sent to moon which will move on moon's surface with wheels, collect soil and rock samples, do analysis on it and send the data to spacecraft.

Image Credit: ISRO

Another very exciting news is that after the moon mission ISRO is going to start mars mission very soon. In this mission a spacecraft will be launched in mars orbit which will study its atmosphere. This could be launched in Nov 2013.

ISRO offers the opportunity for the post of Scientists/Engineers 'SC' in the discipline of Electronics and Mechanical Engineering. Currently the pay band for Scientists/Engineers 'SC' is Rs. 15600-39100 with a grade pay of Rs. 5400/-. So at present the gross amount will be  Rs. 33,180/- per month. Besides this House Rent Allowance (HRA) and Transport Allowance (TA) will also be provided who are not availing housing and transport facilities. The employees will also get pension according to new pension scheme. Other facilities include medical facilities for self and dependents, subsidized canteen facilities, limited housing facilities for freshers and many more.

ISRO is a Govt. job. So you can enjoy your life as well as you will learn a lot of things from it. Once you qualify it, you will get a lot of reputation from your society, from you family, from your neighbors and friends. If you want to do research in your life especially about space then ISRO is a good choice. But as there are very less vacancies available, a huge competition will must be there in ISRO exam. You need to prepare accordingly.

After all if some body asks you, "What do you do ?". You will feel proud to say "I am a scientist in ISRO". So do a smart preparation, grab the exciting opportunities from ISRO and finally be a scientist in your life.  

Some Interview Questions 

Q) What do you mean by input bias current in op-amp ? How to mitigate this problem ?
Q) What is the need of pre-emphasis in communication system ?
Q) What is common mode rejection ratio ? How it is measured and what is its unit ?
Q) What is Q factor of a parallel RLC circuit ? What is the significance of Q factor ? 
Q) What is voltage standing wave ratio ? If VSWR=1 then what does it signifies ?
Q) What do you mean by dominant mode of waveguide ? What are the dominant modes of circular and rectangular waveguides ?
Q) Which type of waveguides do not allow TEM modes and why ?

ISRO Interview Questions-1

How to prepare: In interview they generally ask about your favorite subject. So think twice before replying them. They are going to ask questions from your favorite subject. If you are not able to answer even very simple questions from your favorite subject it may create a bad impression. So before going to interview think yourself which subject you personally like the most or about which topic you have more knowledge. 

Following questions are very very important for ISRO Interview. So prepare yourself accordingly.

Q) What is race around condition ? Why it occurs ? How it can be avoided ?

Q) What is Nyquist sampling theorem ? If it will not be satisfied for a communication system what will happen ?

Q) What is fan-out ? What is the mathematical formula to calculate fan-out ?

Q) Describe the process of amplitude modulation ? What is modulation depth ?
Q) What is tri-state logic inverter ? Explain with the help of truth table ?
Q) Draw the equivalent circuit of a microwave transmission line. What do you mean by characteristic impedance and what is its value for a loss less transmission line ?
Q) What do you mean by the terms LEO, GEO and MEO with respect to satellite communication ?
Q) What is Fourier transform ? Why and when it is needed ?
Q) What are the different types of techniques available for error detection and correction in digital communication ?
Q) How can you implement a full subtractor with the help of half subtractors ?

ISRO 2010 solutions-1

You can get ISRO (Scientist/Engineer 'SC' EC-2010) question paper from internet.  I am trying to solve these questions. If there is any wrong in my answers then please reply me. This post contains the following answers
(6)-b, (11)-d, (13)-a, (15)-d, (16)-c, (18)-c, (19)-b, (20)-b, (24)-d, (25)-b, (29)-c, (31)-c, (34)-b, (35)-d, (38)-a, (41)-c, (72)-c, (76)-c, (78)-a, (79)-b

EXPLANATIONS

(6)-b

Note: Design For Testing is a testing process which is done during the manufacturing of different Integrated circuits and hardware. This test is generally done to ensure that the hardware contains no defects that may lead to malfunctioning of the hardware or IC. Application Specific Integrated Circuits (ASIC) are those integrated circuits which are built for a particular purpose.

(11)-d 

Note: Stripline is a conductor which is placed inside a dielectric and the dielectric is again sandwiched by two ground plane on opposite side.

Microstrip line is a conductor separated from the ground plane by a dielectric. It acts like a transmission line which is fabricated just like the printed circuit board(PCB). The main disadvantage of microstrip line is the unwanted radiation loss. As the microstrip is completely an open structure the radiation loss is more here. One disadvantage of stripline is it is more expensive to manufacture compared to microstrip.

(13)-a

Note:

(15)-d

Note: Rank of a matrix is equal to the order of highest non-zero minor. So the rule is: A matrix 'M' is said to be of rank p if and only if there is at least one minor of the matrix 'M' of order p is not zero and all other minors of matrix 'M' of order p+1 are zero.

(16)-c  (I have done it by method of rejection)
Note: 'a' is wrong because the summation of eigen values of a matrix is called trace of the matrix. 'b' is wrong because the eigen values of a skew matrix are purely imaginary and eigen values of symmetrix matrix are real. 'd' is wrong because according to Rouche-Capelli theorem if the rank of augmented matrix is greater than the rank of the coefficient matrix than the system is inconsistent.

(18)-c

Note: The content of the shift register will be changed in the following sequence.

1010-->1101-->0110-->0011-->0001-->1000-->0100-->1010 (here --> represents the clock pulse) 

(19)-b
Note: GDS-II is a binary file which contains all the information about the layout of a integrated circuit. This file format can be used for reconstructing the entire layout structure of an ICs and also to transfer the layout to a different tool. This is the lowest level of abstraction for the representation of digital system.

(20)-b 
Note: MVI - Move Immediate 8-bit data - The immediate 8-bit data will be stored in the destination register. ORA - It will do the logical OR operation of the register with the accumulator and the result will be stored in accumulator. RLC - Rotate accumulator left - Each bit of accumulator will be shifted by one position left. Bit D7 is placed in the position of D0.
A = A7h = 10100111
               10100111
              -----------
A OR A =  10100111
Now shifting each bit of accumulator by one position left we get 01001111 = 4fh

(24)-d
Note: Schottky diode is a diode whose forward voltage drop lies between 0.15-0.45 volts. This voltage drop is very low as compared to 0.6-1.7 voltage drop of a normal PN junction diode.

Schottky Diode

As there is no charge carrier in the depletion region its reverse recovery time is very less. Hence it quickly changes its state from conducting to non conducting and vice versa which leads to increased efficiency. The major disadvantage of Schottky diode is its high reverse leakage current.

(25)-b
Note: In UJT relaxation oscillator, frequency of oscillation is

(29)-c

Note: Ampere's law defines the force of interaction between two current carrying conductor. According to this law force between two parallel conductors is given by

F is the force between the two conductors. I1,I2 are current flowing through the conductors. l is the length of each conductor. d is the distance between the conductors. 

(31)-c

Note:

(34)-b
Note: Shannon-Hartley theorem tells a relation between channel capacity(C), bandwidth(B) and signal to noise ratio(S/N).

(35)-d

Note: As we know that

(38)-a
Note:

(41)-c

Note: Rowland's law or Hopkinson's law for magnetic circuit is equivalent to Ohm's law in electric circuit. According to Ohm's law E=IR where E is EMF, I is current and R is electric resistance. Similarly according to Rowland's law F=Φℜ where F is magneto-motive force, Φ is magnetic flux and ℜ is magnetic reluctance. 

(72)-c
Note:

(76)-c

Note: A point is said to be in a jump discontinuity if for that point, limit L^- and L⁺ exist but they are not equal.The same has been described in the following graph.

(78)-a
Note: Zener diode is a diode which allows the current to flow through it in the reverse biased condition when the reverse voltage reaches the break down voltage. Once the break down occurs the voltage remains at the same level irrespective of the power source. This is the reason for which the zener diode is used as the voltage regulator. So relating to our problem, here the voltage across the load will be the same as the break down voltage of the last zener diode parallel to it. 

(79)-b
Note: Applying Kirchhoff law to the circuit

I(s)=sV2(s)-V2(0)-sI(s)+I(0),  putting all the initial condition zero we will get
V1(s)-I(s)-sI(s)=V2(s)     and    I(s)=sV2(s)-sI(s)
Now putting the value of I(s) from second equation in the first we get Trasfer function=1/(s+1)



Solutions to rest of the questions will be published very soon. Keep on visiting this blog. Thank you.

Analog vs Digital Communication

Analog

The signals which are continuous are called analog signals. For example a sound coming from a car is an analog signal.
Advantage

• Analog signals are less complicated and less expensive.
• Mathematical implementation of analog signal is easier.
• In presence of heavy noise, analog signals never completely degrades.
• Unlike digital signals analog signals does not have any quantization loss.
• It also does not require highly complicated ICs for processing. If some analog components will be present then it can be processed easily.

Disadvantage

• Analog signals are sensitive to noise.
• If analog signal undergoes degradation, it is difficult to verify where and when the degradation occurred.
• It is difficult to enhance the degraded analog signals as it may lead to amplification of noise as well.

Digital

The signals which are represented by binary values 0 and 1 is called digital signals. 0 and 1 corresponds to low voltage and high voltage respectively.

Advantage

• It is easier to store in memory as the entire signal comprises of a series of 0 and 1.
• Digital signal comparatively more immune to noise.
• There are a lot of channel coding and error correction codes are available for an effective and error free transmission of digital signals.
• Degraded digital signals can be easily reconstructed by using advanced algorithms and digital signal processors.

Disadvantage

• Digital signals may be completely lost at the presence of excessive noise.
• Digital signal processing is highly complicated and require a lot of mathematical calculation hence the digital processors are bit expensive.
• Digital signals undergoes quantization loss.
• Digital signals require a bunch of heavily complicated  ICs for its processing.

Control System Ques & Ans (H001)

In force voltage analogy velocity in mechanical system is equivalent to ___ in electrical system.

(a) Charge       (b) Current
(c) Inductance  (d) Capacitance

The transfer function is defined only for

(a) Linear time-invariant system        (b) Nonlinear time-invariant system 

(c) Nonlinear time variant system      (d) Both a and b

Reduce the block diagram and find out the transfer function.

A system has transfer function (1-s)/(1+s). It is known as

(a) Low-pass system                (b) High-pass system
(c) All-pass system                  (d) None of these

The root locus starts from

(a) zeros and ends on poles             (b) poles and ends on zeros
(c) zeros and ends on infinity           (d) poles and ends on infinity

How to find out the angle of asymptotes with the real axis in root locus analysis ?

The open-loop transfer function of a system is given by

  then which of the following is true

(a) There will be a root locus in between -1 and -2

(b) There will be a root locus in between -5 and -2

(c) There will be a root locus in between -5 and -infinity 

(d) Both a and c

If there are x number of poles and y number of zeros then how many root locus branches goes to infinity.

(a) 2x-y                (b) 2y-x
(c) x-y                  (d) x+y

Root locus is the locus of

(a) Open loop poles               (b) Open loop zeros
(c) Closed loop poles             (d) Closed loop zeros

The starting point of root loci are
(a) Open loop poles               (b) Open loop zeros
(c) Closed loop poles             (d) Closed loop zeros

Root loci ends at

(a) Open loop poles               (b) Open loop zeros
(c) Closed loop poles             (d) Closed loop zeros

There is system with transfer function  
                       G(s)H(s)=k(s+3)/(s+1)(s+2)(s+5)

Find the point where the asymptotes of the root locus intersect the real axis
(a) -2.5                 (b) -2
(c) -1.5                 (d) -1

If number of poles is denoted by p and number of zeros is denoted by z then the angle between the adjacent asymptotes in root locus analysis is

(a) 180/(p+z)                 (b) 90/(p-z)
(c) 360/(p+z)                 (d) 360/(p-z)


Answers

1-b,  2-a,  3-a,  4-b,  5-b,  6-d,  7-b,  8-c,  9-c,  10-a  

11-b,  12-a,  13-d

Open loop and closed loop system

Open loop control system

Advantage

• Sensors are not needed to measure variable as feedback is absent.
• It is easier to build and less expensive.
• It is more stable as feedback is absent.

Disadvantage

• It has no accuracy.
• If non-linearity is present in the input then it cannot be reduced because of absent of feedback.
• More sensitive to system parameter variation.
• Transient response and steady state response cannot be controlled effectively.

Example:

• An automatic faster
• Control of furnace for coal heating
• An electric washing machine

 Closed loop control system

   Advantage

• It gives more accuracy.
• If non-linearity is present in the input then it is reduced by the feedback.
• It is less sensitive to system parameter variation.
• Transient response and steady state response can be controlled more conveniently.

    Disadvantage

• Sensors are needed as feedback is present.
• It is very difficult to build.
• It is comparatively less stable. 

     Example:

• Pressure control system
• Speed Control System
• Robot Control System

Characterstics of Digital ICs

1. Fan-in 
2. Fan-out
3. Noise margin
4. Propagation delay
5. Power dissipation

Fan-in

It indicates the number of inputs of an electronic logic gates. For instance a AND gate with 3 inputs has fan-in of 3. But logic gates with higher fan-in tends to be slower. 

Fan-out

It is the maximum number of inputs that can be driven by the output of another gate. It is generally found that in an integrated circuit the output of a particular gate is connected to input of many other gates. 

There is a limit to how many gates a single gate can drive. So maximum fan-out condition indicates that greatest number of inputs that can be safely connected to the output of a gate. A fan-out of 7 means that 7 unit loads can be driven by the single output of the gate with out affecting the output voltage specification.

Noise margin

It can be defined as the amount of noise that a circuit can with stand.

Description: Lets consider there are two digital circuit A(driving circuit) and B(receiving circuit). Circuit A has been designed to swing between 0V and 2.2 V. But the voltage above 1.9V is considered as logic high and the voltage below 0.2 V is considered as logic low. So for circuit A, VOH=1.9V and VOL=0.2V. Similarly as circuit B is a receiving circuit, the input voltage above 1.6V is logic high and below 0.4 V is logic low. That means for circuit B, VIH=1.6V and VIL=0.4V.

When output voltage of circuit A is low, i.e VO, the input voltage VI must also be low. But because of noise the voltage VI may not be same as VO. It may become higher than that. As long as the increased voltage level is less than VIH, circuit B takes it as a logic low. But if it is more than VIL, it will be implemented as logic high.

Hence there are two different types of noise margin, one for logic high and one for logic zero.

VNH: Noise margin for logic high[1]=VOH-VIH

VNL:Noise margin for logic low[0]=VIL-VOL

Propagation Delay

When an input changes in a logic gate, output doesn't change instantaneously. Hence the time required for the input to be reflected in the output is called propagation delay. 

                             

 tPHL= Delay time in going from logic 1 to logic 0.

 tPLH= Delay time in going from logic 0 to logic 1.

Power Dissipation

Power dissipation is the amount of energy radiated from the IC in the form of heat.

Darlington Circuit

• Darlington circuit is made up of 2 transistors and is used to amplify weak signals.

• The current gain in this case is more than individual current gain taken separately.
• The two transistors here behave like a single transistor with high current gain.
• Darlington circuit provides very high input impedance for overall circuit.

Disadvantages 

• Since there are two base-emitter junction, the equivalent base-emitter voltage doubles.

• Therefore the base-emitter voltage required to turn on a darlington circuit is 2*0.7=1.4V
• The saturation voltage of Darlington circuit is about 0.7 V. This is higher than that of a single transistor, which is typically 0.1-0.2 in silicon. Because of this drawback power dissipation increases in device.
• The switching speed of Darlington pair is slow as compared to single transistor. It is because the first transistor can't suddenly inhibit the base current of the second. To resolve this problem a resistor is connected between the base and emitter of the second transistor. This resistor acts as a low impedance discharge path for the charge accumulated on the base-emitter junction. 

(Darlington circuit with resistor)

• Darlington circuit has more phase shift at higher frequency as compared to single transistor and can more easily become unstable with negative feedback.